/*!
 * \file       ny8b060d.h
 * \brief      NY8B060D header file
 * \author     HuangTing
 * \date       2020.10.26
 * \details    define register
 */

#ifndef NY8B060D_H_S5PBG7ND
#define NY8B060D_H_S5PBG7ND

#ifndef __CPU_HAS_SET
#  ifdef __SDCC
#    warning "Use NY8.h instead of <icbody>.h for consistency."
#  endif
#endif

#include <ny8common.h>

//! INDF (Indirect Addressing Register)
extern __at(0x0000) __sfr INDF;

//! TMR0 (Timer0 Register)
extern __at(0x0001) __sfr TMR0;

//! PCL (Low Byte of PC[10:0])
extern __at(0x0002) __sfr PCL;

//! STATUS (Status Register)
extern __at(0x0003) __sfr STATUS;

//! FSR (Register File Selection Register)
extern __at(0x0004) __sfr FSR;


typedef struct __PORTAbits_t
{
    unsigned        : 1;
    unsigned        : 1;
    unsigned PA2    : 1;
    unsigned        : 1;
    unsigned PA4    : 1;
    unsigned PA5    : 1;
} __PORTAbits_t;

extern __at(0x0005) __sfr PORTA;
extern __at(0x0005) volatile __PORTAbits_t PORTAbits; //!< PortA Data Register
__sbit PA2 = PORTA : 2;
__sbit PA4 = PORTA : 4;
__sbit PA5 = PORTA : 5;

typedef struct __PORTBbits_t
{
    unsigned        : 1;
    unsigned PB1    : 1;
    unsigned PB2    : 1;
    unsigned PB3    : 1;
} __PORTBbits_t;

//! PortB (PortB Data Register)
extern __at(0x0006) __sfr PORTB;
extern __at(0x0006) volatile __PORTBbits_t PORTBbits; //!< PortB Data Register
__sbit PB1 = PORTB : 1;
__sbit PB2 = PORTB : 2;
__sbit PB3 = PORTB : 3;

typedef struct __PCONbits_t
{
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned LVREN  : 1;
    unsigned PHPA5  : 1;
    unsigned LVDEN  : 1;
    unsigned PLPA4  : 1;
    unsigned WDTEN  : 1;
} __PCONbits_t;

//! PCON (Power Control Register)
extern __at(0x0008) __sfr PCON;
extern __at(0x0008) volatile __PCONbits_t PCONbits; //!< PCON (Power Control Register)
__sbit LVREN = PCON : 3;
__sbit PHPA5 = PCON : 4;
__sbit LVDEN = PCON : 5;
__sbit PLPA4 = PCON : 6;
__sbit WDTEN = PCON : 7;

typedef struct __BWUCONbits_t
{
    unsigned        : 1;
    unsigned WUPB1  : 1;
    unsigned WUPB2  : 1;
    unsigned WUPB3  : 1;
} __BWUCONbits_t;

//! BWUCON (PortB Wake-up Control Register)
extern __at(0x0009) __sfr BWUCON;
extern __at(0x0009) volatile __BWUCONbits_t BWUCONbits; //!< BWUCON (PortB Wake-up Control Register)
__sbit WUPB1 = BWUCON : 1;
__sbit WUPB2 = BWUCON : 2;
__sbit WUPB3 = BWUCON : 3;

//! PCHBUF (High Byte of PC)
extern __at(0x000a) __sfr PCHBUF;

typedef struct __ABPLCONbits_t
{
    unsigned       : 1;
    unsigned       : 1;
    unsigned PLPA2 : 1;
    unsigned       : 1;
    unsigned       : 1;
    unsigned PLPB1 : 1;
    unsigned PLPB2 : 1;
    unsigned PLPB3 : 1;
} __ABPLCONbits_t;

//! ABPLCON (PortA/PortB Pull-Low Resistor Control Register)
extern __at(0x000b) __sfr ABPLCON;
extern __at(0x000b) volatile __ABPLCONbits_t ABPLCONbits; //!< ABPLCON (PortA/PortB Pull-Low Resistor Control Register)
__sbit PLPA2 = ABPLCON : 2;
__sbit PLPB1 = ABPLCON : 5;
__sbit PLPB2 = ABPLCON : 6;
__sbit PLPB3 = ABPLCON : 7;

typedef struct __BPHCONbits_t
{
    unsigned       : 1;
    unsigned PHPB1 : 1;
    unsigned PHPB2 : 1;
    unsigned PHPB3 : 1;
    unsigned       : 1;
    unsigned       : 1;
    unsigned       : 1;
    unsigned       : 1;
} __BPHCONbits_t;

//! BPHCON (PortB Pull-High Resistor Control Register)
extern __at(0x000c) __sfr BPHCON;
extern __at(0x000c) volatile __BPHCONbits_t BPHCONbits; //!< BPHCON (PortB Pull-High Resistor Control Register)
__sbit PHPB1 = BPHCON : 1;
__sbit PHPB2 = BPHCON : 2;
__sbit PHPB3 = BPHCON : 3;

typedef struct __INTEbits_t
{
    unsigned T0IE   : 1; //!< Timer0 overflow interrupt enable bit.
    unsigned PABIE  : 1; //!< PortA/PortB input change interrupt enable bit.
    unsigned        : 1;
    unsigned T1IE   : 1; //!< Timer1 underflow interrupt enable bit.
    unsigned LVDIE  : 1; //!< Low-voltage detector interrupt enable bit.
    unsigned        : 1;
    unsigned WDTIE  : 1; //!< WDT timeout interrupt enable bit.
    unsigned INT1IE : 1; //!< External interrupt 1 enable bit.
} __INTEbits_t;

//! INTE (Interrupt Enable Register)
extern __at(0x000e) __sfr INTE;
extern __at(0x000e) volatile __INTEbits_t INTEbits; //!< INTE (Interrupt Enable Register)
__sbit T0IE   = INTE : 0;
__sbit PABIE  = INTE : 1;
__sbit T1IE   = INTE : 3;
__sbit LVDIE  = INTE : 4;
__sbit WDTIE  = INTE : 6;
__sbit INT1IE = INTE : 7;

typedef struct __INTFbits_t
{
    unsigned T0IF   : 1; //!< Timer0 overflow interrupt flag bit.
    unsigned PABIF  : 1; //!< PortA/PortB input change interrupt flag bit.
    unsigned        : 1;
    unsigned T1IF   : 1; //!< Timer1 underflow interrupt flag bit.
    unsigned LVDIF  : 1; //!< Low-voltage detector interrupt flag bit.
    unsigned        : 1;
    unsigned WDTIF  : 1; //!< WDT timeout interrupt flag bit.
    unsigned INT1IF : 1; //!< External interrupt 1 flag bit.
} __INTFbits_t;

//! INTF (Interrupt Flag Register)
extern __at(0x000f) __sfr INTF;
extern __at(0x000f) volatile __INTFbits_t INTFbits; //!< INTF (Interrupt Flag Register)
__sbit T0IF   = INTF : 0;
__sbit PABIF  = INTF : 1;
__sbit T1IF   = INTF : 3;
__sbit LVDIF  = INTF : 4;
__sbit WDTIF  = INTF : 6;
__sbit INT1IF = INTF : 7;

typedef struct __ADMDbits_t
{
    unsigned CHS0   : 1; //!< ADC input channel select bits.
    unsigned CHS1   : 1; //!< ADC input channel select bits.
    unsigned CHS2   : 1; //!< ADC input channel select bits.
    unsigned CHS3   : 1; //!< ADC input channel select bits.
    unsigned GCHS   : 1; //!< ADC global channel select bit.
    unsigned EOC    : 1; //!< ADC status bit, read-only.
    unsigned START  : 1; //!< Start an ADC conversion session.
    unsigned ADEN   : 1; //!< ADC enable bit.
} __ADMDbits_t;

//! ADMD (ADC mode Register)
extern __at(0x0010) __sfr ADMD;
extern __at(0x0010) volatile __ADMDbits_t ADMDbits; //!< ADMD (ADC mode Register)
__sbit CHS0  = ADMD : 0;
__sbit CHS1  = ADMD : 1;
__sbit CHS2  = ADMD : 2;
__sbit CHS3  = ADMD : 3;
__sbit GCHS  = ADMD : 4;
__sbit EOC   = ADMD : 5;
__sbit START = ADMD : 6;
__sbit ADEN  = ADMD : 7;

typedef struct __ADRbits_t
{
    unsigned AD0    : 1; //!< 12-bit low-nibble ADC data buffer.
    unsigned AD1    : 1; //!< 12-bit low-nibble ADC data buffer.
    unsigned AD2    : 1; //!< 12-bit low-nibble ADC data buffer.
    unsigned AD3    : 1; //!< 12-bit low-nibble ADC data buffer.
    unsigned ADCK0  : 1; //!< ADC clock select.
    unsigned ADCK1  : 1; //!< ADC clock select.
    unsigned ADIE   : 1; //!< ADC end-of-convert interrupt enable bit.
    unsigned ADIF   : 1; //!< ADC interrupt flag bit.
} __ADRbits_t;

//! ADR (ADC clock, ADC interrupt flag and ADC LSB output Register)
extern __at(0x0011) __sfr ADR;
extern __at(0x0011) volatile __ADRbits_t ADRbits; //!< ADR (ADC clock, ADC interrupt flag and ADC LSB output Register)
__sbit AD0   = ADR : 0;
__sbit AD1   = ADR : 1;
__sbit AD2   = ADR : 2;
__sbit AD3   = ADR : 3;
__sbit ADCK0 = ADR : 4;
__sbit ADCK1 = ADR : 5;
__sbit ADIE  = ADR : 6;
__sbit ADIF  = ADR : 7;

//! ADD (ADC output data Register)
extern __at(0x0012) __sfr ADD;

typedef struct __ADVREFHbits_t
{
    unsigned VHS0   : 1; //!< ADC internal reference high voltage select bits.
    unsigned VHS1   : 1; //!< ADC internal reference high voltage select bits.
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned EVHENB : 1; //!< ADC reference high voltage (VREFH) select control bit.
} __ADVREFHbits_t;

//! ADVREFH (ADC high reference voltage Register)
extern __at(0x0013) __sfr ADVREFH;
extern __at(0x0013) volatile __ADVREFHbits_t ADVREFHbits; //!< ADVREFH (ADC high reference voltage Register)
__sbit VHS0   = ADVREFH : 0;
__sbit VHS1   = ADVREFH : 1;
__sbit EVHENB = ADVREFH : 7;

typedef struct __ADCRbits_t
{
    unsigned ADCR0  : 1; //!< ADC conversion bit no. select.
    unsigned ADCR1  : 1; //!< ADC conversion bit no. select.
    unsigned SHCK0  : 1; //!< Sampling pulse width select.
    unsigned SHCK1  : 1; //!< Sampling pulse width select.
    unsigned PBCON3 : 1; //!< PB analog pin select.
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
} __ADCRbits_t;

//! ADCR (Sampling pulse and ADC bit Register)
extern __at(0x0014) __sfr ADCR;
extern __at(0x0014) volatile __ADCRbits_t ADCRbits; //!< ADCR (Sampling pulse and ADC bit Register)
__sbit ADCR0  = ADCR : 0;
__sbit ADCR1  = ADCR : 1;
__sbit SHCK0  = ADCR : 2;
__sbit SHCK1  = ADCR : 3;
__sbit PBCON3 = ADCR : 4;

typedef struct __AWUCONbits_t
{
    unsigned       : 1;
    unsigned       : 1;
    unsigned WUPA2 : 1; //!< Enable/disable PA2 wake-up function
    unsigned       : 1;
    unsigned WUPA4 : 1; //!< Enable/disable PA4 wake-up function
    unsigned WUPA5 : 1; //!< Enable/disable PA5 wake-up function
    unsigned       : 1;
    unsigned       : 1;
} __AWUCONbits_t;

//! AWUCON (PortA Wake-up Control Register)
extern __at(0x0015) __sfr AWUCON;
extern __at(0x0015) volatile __AWUCONbits_t AWUCONbits; //!< AWUCON (PortA Wake-up Control Register)
__sbit WUPA2 = AWUCON : 2;
__sbit WUPA4 = AWUCON : 4;
__sbit WUPA5 = AWUCON : 5;

typedef struct __PACONbits_t
{
    unsigned        : 1;
    unsigned        : 1;
    unsigned PACON2 : 1; //!< PA analog pin select
    unsigned        : 1;
    unsigned PACON4 : 1; //!< PA analog pin select
    unsigned        : 1;
    unsigned PBCON1 : 1; //!< PB analog pin select
    unsigned PBCON2 : 1; //!< PB analog pin select
} __PACONbits_t;

//! PACON (ADC analog pin Register)
extern __at(0x0016) __sfr PACON;
extern __at(0x0016) volatile __PACONbits_t PACONbits; //!< PACON (ADC analog pin Register)
__sbit PACON2 = PACON : 2;
__sbit PACON4 = PACON : 4;
__sbit PBCON1 = PACON : 6;
__sbit PBCON2 = PACON : 7;

//! ADC Calibration
extern __at(0x0017) __sfr ADJMD;

typedef struct __INTEDGbits_t
{
    unsigned        : 1;
    unsigned        : 1;
    unsigned INT1G0 : 1; //!< INT1 edge trigger select bit.
    unsigned INT1G1 : 1; //!< INT1 edge trigger select bit.
    unsigned        : 1;
    unsigned EIS1   : 1; //!< External interrupt 1 select bit
    unsigned        : 1;
    unsigned        : 1;
} __INTEDGbits_t;


//! INTEDG (Interrupt Edge Register)
extern __at(0x0018) __sfr INTEDG;
extern __at(0x0018) volatile __INTEDGbits_t INTEDGbits; //!< INTEDG (Interrupt Edge Register)
__sbit INT1G0 = INTEDG : 2;
__sbit INT1G1 = INTEDG : 3;
__sbit EIS1   = INTEDG : 5;

//! TMRH (Timer High Byte Register)
extern __at(0x0019) __sfr TMRH;

typedef struct __ANAENbits_t
{
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned        : 1;
    unsigned BIASEN : 1;
    unsigned CMPEN  : 1;
} __ANAENbits_t;

//! ANAEN (Analog Circuit Enable Register)
extern __at(0x001a) __sfr ANAEN;
extern __at(0x001a) volatile __ANAENbits_t ANAENbits; //!< ANAEN (Analog Circuit Enable Register)
__sbit BIASEN = ANAEN : 6;
__sbit CMPEN  = ANAEN : 7;

typedef struct __RFCbits_t
{
    unsigned PSEL0 : 1; //!< Select RFC pad.
    unsigned PSEL1 : 1; //!< Select RFC pad.
    unsigned PSEL2 : 1; //!< Select RFC pad.
    unsigned PSEL3 : 1; //!< Select RFC pad.
    unsigned       : 1;
    unsigned       : 1;
    unsigned       : 1;
    unsigned RFCEN : 1; //!< Enable/disable RFC function.
} __RFCbits_t;

//! RFC (RFC Register)
extern __at(0x001b) __sfr RFC;
extern __at(0x001b) volatile __RFCbits_t RFCbits; //!< RFC (RFC Register)
__sbit PSEL0 = RFC : 0;
__sbit PSEL1 = RFC : 1;
__sbit PSEL2 = RFC : 2;
__sbit PSEL3 = RFC : 3;
__sbit RFCEN = RFC : 7;

//! TM3RH (Timer3 High Byte Register)
extern __at(0x001c) __sfr TM3RH;

//! IOSTA (PortA I/O Control Register)
extern __at(0x00800005) volatile __fpage IOSTA;

//! IOSTB (PortB I/O Control Register)
extern __at(0x00800006) volatile __fpage IOSTB;

//! APHCON (PortA Pull-High Resistor Control Register)
extern __at(0x00800009) volatile __fpage APHCON;

//! PS0CV (Prescaler0 Counter Value Register)
extern __at(0x0080000a) volatile __fpage PS0CV;

//! BODCON (PortB Open-Drain Control Register)
extern __at(0x0080000c) volatile __fpage BODCON;

//! CMPCR (Comparator voltage select Control Register)
extern __at(0x0080000e) volatile __fpage CMPCR;

//! PCON1 (Power Control Register1)
extern __at(0x0080000f) volatile __fpage PCON1;

//! TMR1 (Timer1 Register)
extern __at(0x01000000) volatile __spage TMR1;

//! T1CR1 (Timer1 Control Register1)
extern __at(0x01000001) volatile __spage T1CR1;

//! T1CR2 (Timer1 Control Register2)
extern __at(0x01000002) volatile __spage T1CR2;

//! PWM1DUTY (PWM1 Duty Register)
extern __at(0x01000003) volatile __spage PWM1DUTY;

//! PS1CV (Prescaler1 Counter Value Register)
extern __at(0x01000004) volatile __spage PS1CV;

//! BZ1CR (Buzzer1 Control Register)
extern __at(0x01000005) volatile __spage BZ1CR;

//! IRCR (IR Control Register)
extern __at(0x01000006) volatile __spage IRCR;

//! TBHP (Table Access High Byte Address Pointer Register)
extern __at(0x01000007) volatile __spage TBHP;

//! TBHD (Table Access High Byte Data Register)
extern __at(0x01000008) volatile __spage TBHD;

//! P2CR1 (PWM2 Control Register)
extern __at(0x0100000a) volatile __spage T2CR1;

//! PWM2DUTY (PWM2 Duty Register)
extern __at(0x0100000c) volatile __spage PWM2DUTY;

//! OSCCR (Oscillation Control Register)
extern __at(0x0100000f) volatile __spage OSCCR;

//! P3CR1 (PWM3 Control Register1)
extern __at(0x01000011) volatile __spage T3CR1;

//! PWM3DUTY (PWM3 Duty Register)
extern __at(0x01000013) volatile __spage PWM3DUTY;

//! T0MD Register
extern __at(0x00800000) volatile __t0mdpage T0MD;

#endif /* end of include guard: NY8B060D_H_S5PBG7ND */

